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austriamicrosystems ag is now ams ag the technical content of this austriamicrosystems datasheet is still valid. contact information: headquarters: ams ag tobelbaderstrasse 30 8141 unterpremstaetten, austria tel: +43 (0) 3136 500 0 e - mail: ams_sales @ams.com please visit our website at www.ams.com
AS5115 programmable 360o magnetic angle encoder with buffered sine & cosine output signals www.austriamicrosystems.com/AS5115 revision 1.11 1 - 20 datasheet 1 general description the AS5115 is a contactless rotary encoder sensor for accurate angular measurement over a full turn of 360o and over an extended ambient temperature range of -40oc to +150oc. based on an integrated hall element array, the angular position of a simple two-pole magnet is translated into analog output voltages. the angle information is provided by means of buffered sine and cosine voltages. this approach gives maximum flexibility in system design, as it can be directly integrated into existing architectures and optimized for various applications in terms of speed and accuracy. an ssi interface is implemented for signal path configuration as well as a one time programmable register block (otp), which allows the customer to adjust the signal path gain to adjust for different mechanical constraints and magnetic field. figure 1. AS5115 block diagram 2 key features ?? contactless angular position encoding ?? high precision analog output ?? buffered sine and cosine signals ?? ssi interface ?? low power mode ?? two programmable output modes: differential or single ended ?? wide magnetic field input range: 20 ? 80 mt ?? wide temperature range: -40oc to +150oc ?? fully automotive qualified to aec-q100, grade 0 ?? ssop-16 package 3 applications the AS5115 is ideal for several automotive and industrial applications. AS5115 vdd vss sinp/sinn sinn/sinp/cm_sin cosp/cosn cosn/cosp/cm_cos prog cs dclk dio otp register hall array & frontend amplifier digital part ssi interface power management buffer stage buffer stage ams ag technical content still valid
www.austriamicrosystems.com/AS5115 revision 1.11 2 - 20 AS5115 datasheet - contents contents 1 general description ......................................................................................................... ......................................................... 1 2 key features............................................................................................................................................................................. 1 3 applications............................................................................................................................................................................... 1 4 pin assignments ....................................................................................................................................................................... 3 4.1 pin descriptions.................................................................................................................................................................................... 3 5 absolute maximum ratings .................................................................................................... .................................................. 4 6 electrical characteristics.................................................................................................. ......................................................... 5 6.1 timing characteristics .................................................................................................... ...................................................................... 6 7 detailed description........................................................................................................ .......................................................... 7 7.1 sleep mode ................................................................................................................ .......................................................................... 7 7.2 ssi interface......................................................................................................................................................................................... 7 7.3 device communication / programming ........................................................................................ ........................................................ 8 7.4 waveform ? digital interface at normal operation mode..................................................................... .............................................. 10 7.5 waveform ? digital interface at extended mode ............................................................................. ................................................... 10 7.6 waveform ? digital interface at analog readback of the zener diodes ....................................................... ..................................... 11 7.7 easyzapp otp content ..................................................................................................................................................................... 11 7.8 analog sin/cos outputs with external interpolator ......................................................................... ................................................... 12 7.9 otp programming and verification .................................................................................................................................................... 13 7.10 pre-programmed version ................................................................................................................................................................. 15 8 application information ..................................................................................................... ...................................................... 16 9 package drawings and markings ............................................................................................... ............................................ 17 10 ordering information....................................................................................................... ...................................................... 19 ams ag technical content still valid
www.austriamicrosystems.com/AS5115 revision 1.11 3 - 20 AS5115 datasheet - pin assignments 4 pin assignments figure 2. pin assignments (top view) 4.1 pin descriptions table 1. pin descriptions pin name pin number pin type description dclk 1 digital input with schmitt trigger clock input for digital interface cs 2 clock input for digital interface, scan enable dio 3 digital input/output data i/o for digital interface, scan input tc 4 analog input/output test coil a_tst 5 analog output/digital output analog test pin, scan output prog 6 supply pad otp programming pad vss 7 also used as vss of test co il + easyzapp (d ouble bond) sinp/sinn 8 analog output buffered analog output sinn/sinp/cm_sin 9 cosp/cosn 10 cosn/cosp/cm_cos 11 tb3 12 analog output/digital input test bus, analog output tb2 13 tb1 14 test bus, analog output; external clock ? sync. prod. test tb0 15 analog output test bus, analog output vdd 16 supply pad digital + analog supply AS5115 1 2 3 4 5 6 7 8 12 16 15 14 13 vdd dclk cs dio tc a_tst prog vss tb0 tb1 tb2 tb3 cosn/cosp/cm_cos cosp/cosn sinn/sinp/cm_sin sinp/sinn 11 10 9 ams ag technical content still valid
www.austriamicrosystems.com/AS5115 revision 1.11 4 - 20 AS5115 datasheet - absolute maximum ratings 5 absolute maximum ratings stresses beyond those listed in table 2 may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in electrical characteristics on page 5 is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. table 2. absolute maximum ratings parameter min max units comments electrical parameters supply voltage (v dd )- 0 . 37v input pin voltage (v_in) -0.3 v dd +0.3 v input current (latchup immunity), i_scr -100 100 ma norm: eia/jesd78 class ii level a electrostatic discharge electrostatic discharge (esd) 2 kv norm: jesd22-a114e continuous power dissipation total power dissipation (p tot ) 275 mw package thermal resistance ( ? _ja) 27 oc/w velocity =0; multi layer pcb; jedec standard testboard temperature ranges and storage conditions storage temperature (t_strg) -65 150 oc package body temperature (t_body) 260 oc norm: ipc/jedec j-std-020. the reflow peak soldering temperature (body temperature) specified is in accordance with ipc/jedec j-std-020 ?moisture/reflow sensitivity classification for non- hermetic solid state surface mount devices?. the lead finish for pb-free leaded packages is matte tin (100% sn). humidity non-condensing 585% moisture sensitive level (msl) 3 represents a maximum floor time of 168h ams ag technical content still valid
www.austriamicrosystems.com/AS5115 revision 1.11 5 - 20 AS5115 datasheet - electrical characteristics 6 electrical characteristics unless otherwise noted in this specification, all defined toler ances of parameters are assured over the whole operation conditi ons range and also over lifetime. table 3. operating conditions symbol parameter condition min typ max unit v dd positive supply voltage 4.5 5.5 v v ss negative supply voltage 0.0 0.0 v t_amb ambient temperature -40 150 oc table 4. dc/ac characteristics for digital inputs and outputs symbol parameter condition min typ max unit cmos input v_ih high level input voltage 0.7 * v dd v dd v v_il low level input voltage 0 0.3 * v dd v i_leak input leakage current 1 a cmos output v_oh high level output voltage 4ma v dd - 0.5 v dd v v_ol low level output voltage 4ma 0 v ss + 0.4 v c_l capacitive load 35 pf cmos output tristate i_oz tristate leakage current 1 a table 5. magnetic input specification symbol parameter condition min typ max unit b zpp magnetic input field amplitude peak to peak at the radius (=1mm) of the hall array 32 160 mt b_offset magnetic field offset within the linear range of the magnet -10 +10 mt f rot rotational speed maximum 30,000 rpm 0 500 hz table 6. electrical system specifications symbol parameter condition min typ max unit idd current consumption maximum value derived at maximum i_h (hall bias current) 28 ma t power_on power up time 1.275 ms t prop propagation delay -40oc to 150oc 18 22 30 s m magnetic sensitivity version: AS5115 10 60 mv / mt version: AS5115a 20.72 28 35.28 v pp analog output voltage amplitude (peak to peak) 1.38 1.94 2.5 v am temp am tracking accuracy over temperature -40oc to 150oc -1 +1 % am sin / cos amplitude mismatch 25oc -2 +2 % v offset1 output dc offset voltage at no input signal; programmable otp setting (see page 8) 1.47 1.5 1.53 v v offset2 2.45 2.5 2.55 dc offdrift dc offset drift -40oc to 150oc -50 +50 v/oc ams ag technical content still valid
www.austriamicrosystems.com/AS5115 revision 1.11 6 - 20 AS5115 datasheet - electrical characteristics 6.1 timing characteristics remark: the digital interface will be reset during the low phase of the cs signal. v out analog output range v ss + 0.25 v dd - 0.5 v i out output current -1 1 ma c load capacitive load 1000 pf table 7. timing characteristics symbol parameter condition min typ max unit t1_3 chip select to positive edge of dclk see figure 5 and figure 6 30 - ns t2_3 chip select to drive bus externally 0-ns t3 setup time command bit data valid to positive edge of dclk 30 - ns t4 hold time command bit data valid after positive edge of dclk 15 - ns t5 float time positive edge of dclk for last command bit to bus float -n s t6 bus driving time positive edge of dclk for last command bit to bus drive -n s t7 data valid time positive edge of dclk to bus valid ns t8 hold time data bit data valid after positive edge of dclk -n s t9_3 hold time chip select positive edge dclk to negative edge of chip select -n s t10_3 bus floating time negative edge of chip select to float bus -3 0 n s t11 setup time data bit at write access data valid to positive edge of dclk 30 - ns t12 hold time data bit at write access data valid after positive edge of dclk 15 - ns t13_3 bus floating time negative edge of chip select to float bus -3 0 n s table 6. electrical system specifications symbol parameter condition min typ max unit ams ag technical content still valid
www.austriamicrosystems.com/AS5115 revision 1.11 7 - 20 AS5115 datasheet - detailed description 7 detailed description the benefits of AS5115 are as follows: ?? complete system-on-chip, no angle calibration required ?? ideal for applications in harsh environments due to magnetic sensing principle ?? high reliability due to non-contact sensing ?? robust system, tolerant to horizontal misalignment, temperature variations and external magnetic fields 7.1 sleep mode the target is to provide the possibility to reduce the total current consumption. no output signal will be provided when the ic is in sleep mode. enabling or disabling sleep mode is done by sending the sleep or wakeup commands via. the ssi interface. analog blocks are powe red down with respect to fast wake up time. 7.2 ssi interface the setup for the device is handled by the digital interface. each communication starts with the rising edge of the chip select signal. the synchronization between the internal free running analog clock oscillator and the external used digital clock source for the di gital interface is done in a way that the digital clock frequency can vary in a wide range. table 8. ssi interface pin description port symbol function chip select cs indicates the start of a new access cycle to the device cs = lo o reset of the digital interface dclk dclk clock source for the communication over the digital interface bidirectional data input output dio command and data information over one single line the first bit of the command defines a read or write access table 9. ssi interface parameter description symbol parameter notes min typ max unit f_dclk clock frequency at normal operation the nominal value for the clock frequency can be derived from a 10mhz oscillator source. no limit 5 6 mhz f_ez_rw clock frequency at easy zap read write access no limit 5 6 khz f_ez_prog clock frequency at easy zap access program otp correct access to the programmable zener diode block needs a strict timing ? the zap pulse is exact one period. the nominal value for the clock frequency can be derived from a 10mhz oscillator source. 200 - 650 khz f_ez_arb clock frequency at easy zap analog readback 20pf external load allowed. the nominal value for the clock frequency can be derived from a 10mhz oscillator source. no limit 156.3 162.5 khz parameter notes interface genera l at normal mode protocol: 5 command bit + 16 data input output command 5-bit command: cmd<4:0> m bit<21:16> data 16-bit data: data<15:0> m bit<15:0> interface general at extended mode protocol: 5 command bit + 46 data input output ams ag technical content still valid
www.austriamicrosystems.com/AS5115 revision 1.11 8 - 20 AS5115 datasheet - detailed description 7.3 device communication / programming note: ?r? stands for reserved bits. they must not be modified, unless otherwise noted. remark: 1. send en prog (command 16) in normal mode before accessing the otp in extended mode. 2. otp assignment will be defined/updated. command 5-bit command: cmd<4:0> ? bit<50:46> data 34-bit data: data<45:0> ? bit<45:0> interface modes normal read operation mode cmd<4:0> = <00xxx> ? 1 dclk per data bit extended read operation mode cmd<4:0> = <01xxx> ? 4 dclk per data bit normal write operation mode cmd<4:0> = <10xxx> ? 1 dclk per data bit extended write operation mode cmd<4:0> = <11xxx> ? 4 dclk per data bit table 10. digital interface at normal mode # command bin mode 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 23 write_config 10111 write go2sleep gen_rst analog_sig ob_bypassed 16 en_prog 10000 write 1 0 0 0 1 1 0 0 1 0 1 0 1 1 1 0 name functionality go2sleep enter/leave low power mode (no output signals) gen_rst generates global reset analog_sig switches the channels to the test bus after the pga ob_bypassed disable and bypass output buffer for testing purpose table 11. digital interface at extended mode # command bin mode factory settings user settings <45:44> <43: 26> <25:23> <22:20> <19:18> <17:14> <13> <12> <11> <10> <9> <8:7> <6> <5:0> 31 write_otp 11111 xt write r r r r r r r r invert_ channel cm_sin cm_cos gain dc_ offset hall_ bias 25 prog_otp 11001 xt write r r r r r r r r invert_ channel cm_sin cm_cos gain dc_ offset hall_ bias 15 rd_otp 01111 xt read r r r r r r r r invert_ channel cm_sin cm_cos gain dc_ offset hall_ bias 9 rd_otp_ana 01001 xt read name functionality invert_channel inverts sin and cos channel before the pga for inverted output function (0 ? sin/cos, 1 ? sinn/cosn) cm_sin common mode voltage output enabled at sinn / cm pin (0 ? differential, 1 ? common) cm_cos common mode voltage output enabled at cosn / cm pin (0 ? differential, 1 ? common) gain pga gain setting (influences overall magnetic sensitivity), 2-bit dc_offset output dc bias offset (0 ? voffset1=1.5v, 1 ? voffset2=2.5v) hall_b hall bias setting (influences overall magnetic sensitivity), 6-bit parameter notes ams ag technical content still valid
www.austriamicrosystems.com/AS5115 revision 1.11 9 - 20 AS5115 datasheet - detailed description figure 3. sensitivity gain settings - relative sensitivity in % the amplitude of the output signal is programmable via sensitivity (6bit) and/or gain (2bit) settings (see figure 3) . figure 4. sensitivity gain settings - sensitivity [mv/mt] magnetic sensitivity vs. otp hall current & pga gain setting 100 150 200 250 300 350 400 450 500 550 600 0 102030405060 hall current otp setting (6 bits) relative sensitivity in % m_pga_00 m_pga_01 m_pga_10 m_pga_11 magnetic sensitivity vs. otp hall current & pga gain setting 0 10 20 30 40 50 60 70 0 102030405060 hall current otp setting (6 bits) sensitivity [mv/mt] m_pga_00 m_pga_01 m_pga_10 m_pga_11 ams ag technical content still valid
www.austriamicrosystems.com/AS5115 revision 1.11 10 - 20 AS5115 datasheet - detailed description 7.4 waveform ? digital interf ace at normal operation mode figure 5. digital interface at normal operation mode 7.5 waveform ? digital in terface at extended mode in the extended mode, the digital interface needs four clocks for one data bit due to the internal structure. during this time, the device is able to handle internal signals for special access (e.g. the easy zap interface). figure 6. digital interface at extended mode dclk cs dio dio d15 d13 d14 d0 cmd_phase data_phase t1_3 t9_3 t2_3 t5 t7 t8 t4 t3 t6 t10_3 t13_3 t12 t11 dio cmd read write cmd4 cmd3 cmd2 cmd1 cmd0 d15 d13 d14 d0 dclk cs dio dio cmd4 cmd3 cmd2 cmd1 cmd0 d45 d44 d45 d44 d0 d0 cmd_phase data_phase t1_3 t9_3 t2_3 t5 t7 t8 t4 t3 t6 t10_3 t13_3 t12 t11 dio cmd read write ams ag technical content still valid
www.austriamicrosystems.com/AS5115 revision 1.11 11 - 20 AS5115 datasheet - detailed description 7.6 waveform ? digital interface at an alog readback of the zener diodes to be sure that all zener-diodes are correctly burned, an analog readback mechanism is defined. perform the ?read otp ana? sequ ence according to the command table and measure the value of the diode at the end of each phase. figure 7. digital interface at analog readback of zener diodes 7.7 one time programming content the AS5115 die has an integrated 46-bit otp rom (easyzapp) for tr imming and configuration purposes. the prom can be programmed via. the serial interface. for irreversible programming, an external programming voltage at prog pin is needed. for security reasons , the factory trim bits can be locked by a lock bit. as shown in the table below, the otp holds 46 bits. bit number 44 and 45 are used for otp testing purposes and esd protection of the remaining cells. remark: otp assignment will be defined/updated. table 12. serial bit sequence (16-bit read / write) write command read / write data c4 c3 c2 c1 c0 d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 name bit count otp start otp end access comments hall_b 6 0 5 user sets overall sensitivity dc_offset 1 6 6 user output dc offset setting gain 2 7 8 user output buffer gain setting lock 1 13 13 austriamicrosystems set in production test invert_channel 1 11 11 user inverts sin and cos channel before the pga for inverted output function cm_sin 1 10 10 user common mode voltage output enabled at sinn / cm pin cm_cos 1 9 9 user common mode voltage output enabled at cosn / cm pin cmd0 cmd1 cmd2 cmd3 cmd4 ext d45 ext d44 ext d1 ext d0 cmd_phase data_phase_extended perform analog measurements at prog otp d45 otp d44 otp d43 otp d0 dclk cs dio prog ams ag technical content still valid
www.austriamicrosystems.com/AS5115 revision 1.11 12 - 20 AS5115 datasheet - detailed description 7.8 analog sin/cos outputs wi th external interpolator figure 8. sine and cosine outputs for external angle calculation the AS5115 provides analog sine and cosine outputs (sinp, cosp) of the hall array front-end for test purposes. these outputs al low the user to perform the angle calculation by an external adc + c, e.g. to compute the angle with a high resolution. the signal lines mu st be kept as short as possible. in the case of longer lines, they must be shielded in order to achieve best noise performance. through the programming of one bit, you have the possibility to choose between the analog sine and cosine outputs (sinp, cosp) and their inverted signals (sinn, cosn). furthermore, by programming the bits <9:10> you can enable the common mode output signals of sin and cos. v dd v ss micro controller as5130 100n v ss +5v v dd sinn/sinp/cm_sin v dd sinp/sinn cosn/cosp/cm_cos cosp/cosn v ss AS5115 d da a prog 100k notes: 1. we recommend to use a 100k pull-up resistance. 2. default conditions for unused pins are: dclk, cs, dio, tc, a_tst, tbo, tb1, tb2, tb3 connect to vss ams ag technical content still valid
www.austriamicrosystems.com/AS5115 revision 1.11 13 - 20 AS5115 datasheet - detailed description 7.9 otp programming and verification figure 9. otp programming connection note: the maximum capacitive load at prog in normal operation should be less than 20pf. however, during programming the capacitors c1+c2 are needed to buffer the programming voltage during current spikes, but they must be removed for normal operation. to overcome this contradiction, the recommendation is to add a diode (4148 or similar) between prog and v dd as shown in figure 9 (special case setup), if the capacitors can not be removed at final assembly. due to d1, the capacitors c1+c2 are loaded with v dd - 0.7v at startup, hence not influencing the readout of the internal otp registers. during programming the otp, the diode ensures that no current is flowing from prog (8v - 8.5v) to vdd (5v). in the standard case (see figure 9) , the verification of a correct otp readout can be done by analog readback of the otp register. as long as the prog pin is accessible it is recommended to use standard setup. in case the prog pin is not accessible at final assembly, the special setup is recommended. v dd v ss micro controller as5130 100n v ss +5v v dd cs v dd dclk dio prog v ss AS5115 + - 10f 100n 8.0 - 8.5v i/o output output v dd v supply prog gnd c1 c2 100nf 10f v zapp v prog prom cell maximum parasitic cable inductance l<50nh standard case v dd v supply prog gnd c1 c2 100nf 10f v prog prom cell l<50nh special case remove for normal operation ams ag technical content still valid
www.austriamicrosystems.com/AS5115 revision 1.11 14 - 20 AS5115 datasheet - detailed description for programming of the otp, an additional voltage has to be applied to the pin prog. it has to be buffered by a fast 100nf capa citor (ceramic) and a 10f capacitor. the information to be programmed is set by command 25. the otp bits 16 until 45 are used for ams factory trimming and cannot be overwritten. after programming, the programmed otp bits can be verified in two ways: by digital verification: this is simply done by sending a read otp command (#15). the structure of this register is the same as for the otp prog or otp write commands. by analog verification: by switching into extended mode and sending an analog otp read command (#9), pin prog becomes an output, sending an analog voltage with each clock representing a sequence of the bits in the otp register (starting with d45). a voltag e of <500mv indicates a correctly programmed bit (?1?) while a voltage level between 2v and 3.5v indicates a correctly unprogrammed bit (?0 ?). any voltage level in between indicates incorrect programming. figure 10. analog otp verification symbol parameter min max unit note v dd supply voltage 5 5.5 v gnd ground level 0 0 v v_zapp programming voltage 8 8.5 v at pin prog t_zapp temperature 0 85 oc f_clk clk frequency 100 khz at pin dclk v dd v ss micro controller as5130 100n v ss +5v v dd cs v dd dclk dio prog v ss AS5115 i/o output output v ams ag technical content still valid
www.austriamicrosystems.com/AS5115 revision 1.11 15 - 20 AS5115 datasheet - detailed description 7.10 pre-programmed version table 13. pre-programmed version version marking sensitivity output output dc offset pga gain setting hall bias current AS5115 not programmed 1.5v 0 not programmed untrimmed AS5115a 28 mv/mt 2.5v 1 00 12.15a AS5115 yywwmzz AS5115a yywwmzz ams ag technical content still valid
www.austriamicrosystems.com/AS5115 revision 1.11 16 - 20 AS5115 datasheet - application information 8 application information figure 11. vertical cross section of ssop-16 notes: 1. all dimensions in mm. ams ag technical content still valid
www.austriamicrosystems.com/AS5115 revision 1.11 17 - 20 AS5115 datasheet - package drawings and markings 9 package drawings and markings the devices are available in a 16-lead shrink small outline package. figure 12. package drawings and dimensions notes: 1. dimensions and tolerancing conform to asme y14.5m-1994 . 2. all dimensions are in millimeters. angles are in degrees. marking: yywwmzz. yy ww m zz last two digits of the manufacturing year manufacturing week plant identifier assembly traceability code symbol min nom max a 1.73 1.86 1.99 a1 0.05 0.13 0.21 a2 1.68 1.73 1.78 b 0.22 0.30 0.38 c 0.09 0.17 0.25 d 5.90 6.20 6.50 e 7.40 7.80 8.20 e1 5.00 5.30 5.60 e - 0.65 bsc - l 0.55 0.75 0.95 l1 - 1.25 ref - l2 - 0.25 bsc - r0.09 - - ? 0o 4o 8o n1 6 ams ag technical content still valid
www.austriamicrosystems.com/AS5115 revision 1.11 18 - 20 AS5115 datasheet - revision history revision history note: typos may not be explicitly mentioned under revision history. revision date owner description 1.0 jul 03, 2008 apg initial revision 1.1 jul 15, 2008 key features and pin description updated. 1.2 jul 14, 2009 updated min, typ, max values for ?power up time? parameter in table 6 . 1.3 nov 30, 2009 deleted ?displacement? parameter from table 5 . updated the following parameters in table 6 : - values and conditions updated for 1. propagation delay 2. amplitude ratio tracking accuracy over temperature 3. dc offset drift - deleted the ?output offset? parameter from the table. updated following bits related information on page 8 - invert_channel, cm_sin, cm_cos, gain, dc_offset, hall_b inserted figure 3 and figure 4 updated key features (page 1) , table 11 , and figure 8 hall array radius value updated from 1.1mm to 1mm 1.4 dec 11, 2009 updated values for ?magnetic sensitivity? parameter in table 6 . 1.5 mar 02, 2010 updated ?interface general at extended mode? (see table 9) updated values for ?power up time? parameter in table 6 . added pin type in table 1 , updated reserved bits information in table 11 . mar 19, 2010 added ?current consumption? parameter in table 6 . nov 10, 2010 sti updated table 5 and table 6 . 1.6 feb 07, 2011 mub added figure 11 . updated package drawings and markings (page 17) , table 2 and table 5 . removed magnet related detailed info. 1.7 feb 16, 2011 sti updated table 5 . 1.8 mar 22, 2011 mub updated package drawings and markings (page 17) . apr 07, 2011 apg deleted tubes variant in ordering information (page 19) . may 26, 2011 mub updated key features, otp programming and verification, table 4 , table 6 . jun 10, 2011 updated absolute maximum ratings (page 4) . 1.9 sep 19, 2011 updated ordering information (page 19) . 1.10 dec 14, 2011 ekno added subversion AS5115a info in the datasheet. feb 10, 2012 updat ed figure 9 added note on page13. 1.11 mar 06, 2012 updated table 6 and figure 9 ams ag technical content still valid
www.austriamicrosystems.com/AS5115 revision 1.11 19 - 20 AS5115 datasheet - ordering information 10 ordering information the devices are available as the standard products shown in table 14 . note: all products are rohs compliant and austriamicrosystems green. buy our products or get free samples online at icdirect: http://www.austriamicr osystems.com/icdirect technical support is available at http://www.austriamicrosystems.com/technical-support for further information and requests, please contact us mailto: sales@austriamicrosystems.com or find your local distributor at http://www.austriamicros ystems.com/distributor table 14. ordering information ordering code description delivery form package AS5115-hssp buffered sine and cosine output signals tape & reel 16-pin ssop AS5115a-hssp tape & reel 16-pin ssop ams ag technical content still valid
www.austriamicrosystems.com/AS5115 revision 1.11 20 - 20 AS5115 datasheet - copyrights copyrights copyright ? 1997-2012, austriamicrosystems ag, tobelbaderstrasse 30, 8141 unterpremstaetten, austria-europe. trademarks registe red ?. all rights reserved. the material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. all products and companies mentioned are trademarks or registered trademarks of their respective companies. disclaimer devices sold by austriamicrosystems ag are covered by the warranty and patent indemnification provisions appearing in its term of sale. austriamicrosystems ag makes no warranty, express, statutory, implied, or by description regarding the information set forth he rein or regarding the freedom of the described devices from patent infringement. austriamicrosystems ag reserves the right to change specificatio ns and prices at any time and without notice. therefore, prior to designing this product into a system, it is necessary to check with austriamic rosystems ag for current information. this product is intended for use in normal commercial applications. applications requiring extended temper ature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by austriamicrosystems ag for each application. for shipments of les s than 100 parts the manufacturing flow might show deviations from the standard production flow, such as test flow or test location. the information furnished here by austriamicrosystems ag is believed to be correct and accurate. however, austriamicrosystems ag shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. no obligation or liability to recipient or any third party shall arise or flow out of austriamicrosystems ag rendering of technical or other services. contact information headquarters austriamicrosystems ag tobelbaderstrasse 30 a-8141 unterpremstaetten, austria tel: +43 (0) 3136 500 0 fax: +43 (0) 3136 525 01 for sales offices, distributors and representatives, please visit: http://www.austriamicrosystems.com/contact ams ag technical content still valid

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